AeroElectric-List Digest Archive

Sun 11/05/23


Total Messages Posted: 2



Today's Message Index:
----------------------
 
     1. 09:48 AM - Re: OVM14 MkIII, rev P6 (Robert L. Nuckolls, III)
     2. 12:09 PM - Re: OVM14 MkIII, rev P6 (Eric Page)
 
 
 


Message 1


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    Time: 09:48:54 AM PST US
    From: "Robert L. Nuckolls, III" <nuckolls.bob@aeroelectric.com>
    Subject: Re: OVM14 MkIII, rev P6
    An update on the project . . . I was scheduled to be receiving boards last Friday along with parts-not-in-inventory. While crafting the parts order, I had discovered a mis-match between the semiconductor package used on the layout and that of the SCR we were going to evaluate. Further, I've not crafted an ECB using an SCR in too many years. I was kinda 'locked' into dozens of recent layouts for power handling MOS-FETS. Oops! The signal input pin (gate) for the two devices are reversed. Be cautious as you age . . . hitorical 'grooves' may feature more pot-holes than you're aware of!. Managed to stop the board order before they fabricated and shipped $90 worth of trash. I've modified the layout to fix the error -AND- to configure pads that will accommodate a constellation of devices and packages. Further, while working the parts order, I discovered an SCR with more attractive ratings. Don't know why this device didn't surface during earlier queries to Digikey's exceedingly capable search engine. I've upgraded to the more attractive SCR. Oh yeah, had to use vias (top to bottom conductor transitions) under the SCR heat sink pad . . . I've got some kevlar tape that makes a nice insulator under power components that suffer this shortcoming. Hat tip: Eric Picked my environmental test chamber. Needs a bit of refurbishment but it shouldn't smoke when I plug it in! Looking forward to paying homage to Jack Thurman's circa 1980 qualification tests for OV management systems. So . . . we're only set back one week. Be that as it may, the board has been fixed. Any efforts to validate my work product are most welcome. Latest drawing package: http://aeroelectric.com/AEC_Legacy_Products/9003/AEC9003%20MkIII%20Check%20Drasings%20P6.pdf Bob . . . //// (o o) ===========o00o=(_)=o00o======== < Go ahead, make my day . . . > < show me where I'm wrong. > ================================ In the interest of creative evolution of the-best-we-know-how-to-do based on physics and good practice.


    Message 2


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    Time: 12:09:58 PM PST US
    Subject: Re: OVM14 MkIII, rev P6
    From: "Eric Page" <edpav8r@yahoo.com>
    Lucky catch on the backwards footprint. It all looks dandy to me now. I'd be very interested to read what you have planned for temperature testing. I had a PCB screw-up recently too. I failed to notice the fine print on the board fab's website stating that they don't support blind vias. I ended up with a four-layer board that had via-sized pads top and bottom that weren't connected to the internal planes. Fortunately, it was a very small board and therefore a cheap mistake. Unfortunately, I didn't catch it until after I soldered all of the parts to it and found that it didn't work. Oops! Read this topic online here: http://forums.matronics.com/viewtopic.php?p=511857#511857




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